Openings CV

Wenjie Xiong

Assistant Professor
The Bradley Department of Electrical and Computer Engineering
Virginia Tech

Email: wenjiex@vt.edu [PGP key]
Office: Room 353, Durham Hall

[Google Scholar] [CV]

I lead the BEARHW (Building Efficient and Resilient Hardware) lab at Virginia tech. We leverage hardware features to enhance the security of computer systems as well as identify and mitigate security vulnerabilities that are rooted in hardware design. We are passionated about leveraging hardware to build secure systems.

I am looking for motivated students (postdocs, PhDs, Masters, and undergraduates) to join my group!

Recent News



Research Overview

- Why security and privacy?
We are living in an increasingly connected world where an unprecedented amount of data is being collected, transferred, and processed across tens of billions of connected devices and systems daily, including private user information or company intellectual properties (IPs). In addition to the pursuit of better performance and lower energy, guaranteeing security and privacy is now considered a first-class citizen in architecting and designing future computing systems.

- Why hardware security?
Foundation of security: Hardware is the bottom layer of the computation stack. Hardware vulnerabilities will compromise the whole system and can hardly be mitigated by software efficiently.
Efficient security solution: Hardware-software co-design for security can yield efficient solutions.
Physical features for security: Hardware is the interface between software and the physical world. The physical and analog features of hardware can be leveraged for security.

- How do we pursue hardware security?
We conduct research in the intersection of computer architecture, circuits, cryptography, formal methods, and machine learning. Our goal is to deliver efficient hardware designs with built-in security.

Research Projects

- Secure Heterogeneous Architectures
It is a trend to include several different computing modules, such as GPU, FPGA, ASIC accelerators, memory, etc., to a computing platform for high-performance computing. The heterogeneous architectures face new security challenges to protect data across different modules. New designs are needed to protect data end-to-end.

- Side and Covert Channel Attacks and Mitigations in Processors
Nowadays, hardware is usually reused for different applications or users. For example, many applications are running on one device, multiple talents may share the same server on the cloud, etc. Sharing of hardware leads to the potential side and covert-channel attacks that lead to information leakage. It is a challenge to understand how these attacks happen and how to mitigate them.

- Device Authentication and Software Protection Leveraging Hardware Features
Hardware has physical and analog features that can be leveraged for security purposes. In our DRAM PUFs project, we leverage the DRAM retention error for device authentication, fingerprinting, key storage, and software protection.

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Google Scholar · dblp CS Bibliography · ResearchGate

Peer-reviewed Conference Publications

Peer-reviewed Journal Publications

Technical Reports


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Conference/Workshop Organizing

Conferences/Workshops Program Committees Activities

Journal Reviewing Activities

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Getting involved! We are looking for postdocs, PhDs, Masters, and undergraduates to join us! Please email me. wenjiex@vt.edu