Welcome To The ECE 5506 Home Page
Verification of Digital Systems
Spring, 2007
- INSTRUCTOR:
Michael Hsiao
| Office:
Durham 355 |
Phone: (540) 231-9254 |
Email: mhsiao@vt.edu |
- CLASS MEETING TIME AND PLACE:
Tuesdays and Thursdays, 12:30 - 1:45pm, Rand 116
- OFFICE HOURS: TBA
- PREREQUISITES:
- Logic Design
- Data Structures and Graph Algorithms
- Discrete Math (undergrad level)
- TEXT:
- Logic Synthesis and Verification Algorithms, Hachtel and
Somenzi, Kluwer Academic Publishers, 1996.
- Extra Research Papers
Optional:
- Advanced Formal Verification Drechsler, Kluwer, 2004.
- COURSE OBJECTIVES:
To address fundamental issues in design verification for complex,
high-performance digital systems.
- LECTURE OUTLINE:
- Intro and Background (2 lectures)
- Combinational Logic Verification (7 lectures)
- 2-level logic verification
- Multi-level verification using SAT
- Multi-level verification using BDDs
- Incremental verification
- Sequential Logic Verification (7 lectures)
- Image and pre-image computation
- Projection and reachability analysis
- Fixed point computation
- Approximate techniques
- Incremental techniques
- Model Checking (5 lectures)
- Computational Tree Logic (CTL)
- Property checking
- Symbolic model checking
- Bounded model checking and induction
- Simulation-Based Verification (5 lectures)
- Coverage metrics
- Error-oriented verification
- Coverage-directed simulation
- Symbolic simulation
- Software metrics
- Error Diagnosis (4 lectures)
- Static diagnosis
- Dynamic diagnosis
- PROJECTS:
Several
projects are included and divided into several stages.
- HOMEWORK:
Homework Link
- SYLLABUS:
On-line syllabus (including lectures)
- CONTACT INFORMATION:
Please send an email to
mhsiao@vt.edu by Jan 30, with the following information:
- Full name and email
- Home department (ECE, CS, etc.)
- Year (Grad 1st year, 2nd Year, etc.)
- Office or home phone number
- Current or interested research area (VLSI, wireless, power, etc.)
- Expectations of the course
- HONOR CODE:
As members of
Virginia Tech, we will not tolerate any form of academic dishonesty.
Academic integrity is expected from every student. These include
- you may discuss homework/project with fellow classmates, but each student
must do his/her own work.
- cheating in programs (copying program segments), on exams, and homework
assignments are all considered violations of the honor code.
Go to the ECE Department